| CR16HCS9VJE8 Features | - CPU Features
- Fully static core, capable of operating at any rate from 0 to 24 MHz (4 MHz minimum in active mode)
- Multi-source vectored interrupts (internal, external, and on-chip peripheral)
- Dual clock and reset
- On-chip power-on reset
- On-Chip Memory
- Up to 64 kbytes flash EEPROM program memory; can be programmed, erased, and reprogrammed by software (100 kcycles)
- 3 kbytes of static RAM data memory
- For flash program memory devices, 1.5 kbytes flash EEPROM memory is available to store boot loader code (100 kcycles)
- 2 kbytes of non-volatile EEPROM data memory with low endurance (25 kcycles) and 128 bytes with high endurance (100 kcycles)
- On-Chip Peripherals
- Two Universal Synchronous/Asynchronous Receiver/Transmitter (USART) devices
- Programmable Idle Timer and real-time clock (T0)
- Two dual 16-bit multi-function timers (MFT1 and MFT2)
- 8/16-bit SPI/MICROWIRE-PLUS serial interface
- 12-channel, 8-bit Analog-to-Digital (A/D) converter with external voltage reference, programmable sample-and-hold delay, and programmable conversion frequency
- ACCESS.bus synchronous serial bus
- FullCAN interface with 15 message buffers complaint to CAN specification 2.0B active
- Versatile Timer Unit with four subsystems (VTU)
- Two analog comparators
- Integrated WATCHDOG logic
- I/O Features
- Up to 56 general-purpose I/O pins (shared with on-chip peripheral I/O pins)
- Programmable I/O pin characteristics: TRI-STATE output, push-pull output, weak pull-up input, high-impedance input
- Schmitt triggers on general purpose inputs
- Power Supply
- 4.5V to 5.5V single-supply operation
- Temperature Range
- -40°C to +85°C
- -40°C to +125°C
- Development Support
- Real-time emulation and full program debug capabilities available
- CompactRISC tools provide C programmin
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| CR16HCS9VJE8 Description | The family of 16-bit CompactRISC? microcontroller is based on a Reduced Instruction Set Computer (RISC) architecture. The device operates as a complete microcomputer with all system timing, interrupt logic, flash program memory or ROM memory, RAM, EEPROM data memory, and I/O ports included on-chip. It is ideally suited to a wide range of embedded controller applications because of its high performance, on-chip integrated features and low power consumption resulting in decreased system cost. The device offers the high performance of a RISC architecture while retaining the advantages of a traditional Complex Instruction Set Computer (CISC): compact code, on-chip memory and I/O, and reduced cost. The CPU uses a three-stage instruction pipeline that allows execution of up to one instruction per clock cycle, or up to 25 million instructions per second (MIPS) at a clock rate of 24 MHz. The device contains a FullCAN class, CAN serial interface for low/high speed applications with 15 orthogonal message buffers, each supporting standard as well as extended message identifiers. The device has up to 64K bytes of reprogrammable flash EEPROM program memory or ROM memory, 1.5K bytes of flash EEPROM In-System-Programming memory, 3K bytes of static RAM, 2K bytes of non-volatile EEPROM data memory and 128 bytes with high endurance, two USARTs, two 16-bit multi-function timers, one SPI/MICROWIRE-PLUS? serial interface, a 12-channel A/D converter, two analog comparators, WATCHDOG? protection mechanism, and up to 56 general-purpose I/O pins. The device operates with a high-frequency crystal as the main clock source and either the prescaled main clock source or with a low frequency (32.768 kHz) oscillator in Power Save mode. The device supports several Power Save modes which are combined with multi-source interrupt and wake-up capabilities. This device also has a Versatile Timer Unit (VTU) with four timer sub-systems, a CAN interface, and ACCESS.bus synchronous serial bus interface. Powerfu |