LM12L458CIV

LM12L458CIV Description

LM12L458CIV Manufacturer

LM12L458CIV Datasheet (PDF)

LM12L458CIV Price & Availability

LM12L458CIV Features

• Three operating modes: 12-bit + sign, 8-bit + sign, and "watchdog"
• Single-ended or differential inputs
• Built-in Sample-and-Hold
• Instruction RAM and event sequencer
• 8-channel multiplexer
• 32-word conversion FIFO
• Programmable acquisition times and conversion rates
• Self-calibration and diagnostic mode
• 8- or 16-bit wide databus microprocessor or DSP interface
• CMOS compatible I/O

LM12L458CIV Description

The LM12L458 is a highly integrated 3.3V Data Acquisition System. It combines a fully-differential self-calibrating (correcting linearity and zero errors) 13-bit (12-bit + sign) analog-to-digital converter (ADC) and sample-and-hold (S/H) with extensive analog functions and digital functionality. Up to 32 consecutive conversions, using two's complement format, can be stored in an internal 32-word (16-bit wide) FIFO data buffer. An internal 8-word RAM can store the conversion sequence for up to eight acquisitions through the LM12L458's eight-input multiplexer. The LM12L458 can also operate with 8-bit + sign resolution and in a supervisory "watchdog" mode that compares an input signal against two programmable limits. Programmable acquisition times and conversion rates are possible through the use of internal clock-driven timers.

All registers, RAM, and FIFO are directly addressable through the high speed microprocessor interface to either an 8-bit or 16-bit databus. The LM12L458 includes a direct memory access (DMA) interface for high-speed conversion data transfer.

LM12L458CIV Parameters

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