- Operates from +-5 V to +-18 V supplies
- Less than 10 us acquisition time
- TTL, PMOS, CMOS compatible logic input
- 0.5 mV typical hold step at CH= 0.01 uF
- Low input offset
- 0.002 pct gain accuracy
- Low output noise in hold mode
- Input characteristics do not change during hold mode
- High supply rejection ratio in sample or hold
- Wide bandwidth
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