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PDIUSBD12

PDIUSBD12 Description

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PDIUSBD12 Manufacturer

PDIUSBD12 Datasheet (PDF)

PDIUSBD12 Datasheet

PDIUSBD12 Price & Availability


Check PDIUSBD12 Price & Availability at Canics

PDIUSBD12 Features

  • Complies with the Universal Serial Bus specification Rev. 2.0 (basic speed)
  • High performance USB interface device with integrated SIE, FIFO memory, transceiver and voltage regulator
  • Compliant with most Device Class specifications
  • High-speed (2 Mbytes/s) parallel interface to any external microcontroller or microprocessor
  • Fully autonomous DMA operation
  • Integrated 320 bytes of multi-configuration FIFO memory
  • Double buffering scheme for main endpoint increases throughput and eases real-time data transfer
  • Data transfer rates: 1 Mbytes/s achievable in Bulk mode, 1 Mbits/s achievable in Isochronous mode
  • Bus-powered capability with very good EMI performance
  • Controllable LazyClock output during suspend
  • Software controllable connection to the USB bus (SoftConnect(tm))
  • Good USB connection indicator that blinks with traffic (GoodLink(tm))
  • Programmable clock frequency output
  • Complies with the ACPI, OnNOW and USB power management requirements
  • Internal Power-on reset and low-voltage reset circuit
  • Available in SO28 and TSSOP28 pin packages
  • Full industrial grade operation from -40 to +85 Cel
  • Higher than 8 kV in-circuit ESD protection lowers cost of extra components
  • Full-scan design with high fault coverage (>99pct) ensures high quality
  • Operation with dual voltages: 3.3 +-0.3 V or extended 5 V supply range of 4.0 to 5.5 V
  • Multiple interrupt modes to facilitate both bulk and isochronous transfers.

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