- Monolithic CMOS 3.3 V device, 5 V I²C-bus optional
- Digital PAL/NTSC encoder
- System pixel frequency 13.5 MHz
- 54 MHz double-speed multiplexed D1 interface capable of splitting data into two separate channels (encoded and baseband)
- Three Digital-to-Analog Converters (DACs) for CVBS (CSYNC), VBS (CVBS) and C (CVBS) two times oversampled with 10-bit resolution (signals in brackets optional)
- Three DACs for RED (CR), GREEN (Y) and BLUE (CBtwo times oversampled with 9-bit resolution (signals in brackets optional)
- Alternatively, an advanced composite sync is available on the CVBS output for RGB display centring
- Real-time control of subcarrier
- Cross-colour reduction filter
- Closed captioning encoding and World Standard Teletext (WST) and North-American Broadcast Text System (NABTS) teletext encoding including sequencer and filter
- Copy Generation Management System (CGMS) encoding (CGMS described by standard CPR-1204 of EIAJ); 20 bits in lines 20/283 (NTSC) can be loaded via I²C-bus
- Fast I²C-bus control port (400 kHz)
- Line 23 Wide Screen Signalling (WSS) encoding
- Video Programming System (VPS) data encoding in line 16 (50/625 lines counting)
- Encoder can be master or slave
- Programmable horizontal and vertical input synchronization phase
- Programmable horizontal sync output phase
- Internal Colour Bar Generator (CBG)
- MacrovisionTM(1)Pay-per-View copy protection system rev. 7.01 and rev. 6.1 as option; this applies to SAA7148AH only. The device is protected by USA patent numbers 4631603, 4577216 and 4819098 and other intellectual property rights. Use of the Macrovision anti-copy process in the device is licensed for non-commercial home use only. Reverse engineering or disassembly is prohibited. Please contact your nearest Philips Semiconductors sales office for more information
- Controlled rise/fall times of output syncs and blanking
- On-chip crystal oscillator (3rd-harmonic or fundamental crystal)
- Down mode (low output voltage) or power-save mode of DACs
- QFP44 package.
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