TDA8754 Datasheet

3.3 V power supply
Triple 8-bit ADC
Analog sampling rate from 12 up to 270 Msps
Maximum data rate:
- Single port mode: 140 MHz
- Dual port mode: 270 MHz
- 3.3 V LV-TTL outputs.
PLL control via I²C-bus:
- Low PLL drift with temperature (2 phase steps maximum)
- PLL generates the ADC sampling clock which can be locked on the line frequency from 15 to 150 kHz
- Integrated PLL divider
- Programmable phase clock adjustment cells.
Three clamp circuits for programming a clamp code from -24 to +136 by steps of 1 LSB (mid-scale clamping for YUV signal)
Internal generation of clamp signal
Three independent blanking functions
Input:
- 410 MHz analog bandwidth
- Two independent analog inputs selectable via I²C-bus
- Analog input from 0.5 to 1 V (p-p) to produce a full-scale ADC input of 1 V (p-p)
- Three controllable amplifiers: gain control via I²C-bus to produce full-scale peak-to-peak output with a half LSB resolution.
Synchronisation:
- Frame and field detection for interlaced video signal
- Parasite synchronization pulse detection and suppression
- Sync processing for composite sync, 3-level sync and sync-on-green signals
- Polarity and activity detection.
IC control via I²C-bus serial interface
Power-down mode.

TDA8754