UDA1352TS Datasheet

1.1 General

2.7 to 3.6 V power supply
Integrated digital filter and Digital-to-Analog Converter (DAC)
256f_ssystem clock output
20-bit data path in interpolator
High performance
No analog post filtering required for DAC
Supporting sampling frequencies from 28 up to 55 kHz. 1.2 Control
Controlled either by means of static pins, I²C-bus or L3-bus microcontroller interface. 1.3 IEC 60958 input
On-chip amplifier for converting IEC 60958 input to CMOS levels
Lock indication signal available on pin LOCK
Information of the Pulse Code Modulation (PCM) status bit and the non-PCM data detection is available on pin PCMDET
For left and right 40 key channel-status bits available via L3-bus or I²C-bus interface. 1.4 Digital sound processing and DAC
Automatic de-emphasis when using IEC 60958 input with 32.0, 44.1 and 48.0 kHz audio sample frequencies
Soft mute by means of a cosine roll-off circuit selectable via pin MUTE, L3-bus or I²C-bus interface
Left and right independent dB linear volume control with 0.25 dB steps from 0 to -50 dB, 1 dB steps to -60, -66 and -dB
Bass boost and treble control in L3-bus or I²C-bus mode
Interpolating filter (f_sto 64f_s) by means of a cascade of a recursive filter and a FIR filter
Fifth-order noise shaper (operating at 64f_s) generates the bitstream for the DAC
Filter Stream DAC (FSDAC).

UDA1352TS