5962-9052604Q9A Description5962-9052604Q9A Categories5962-9052604Q9A Manufacturer
5962-9052604Q9A Datasheet (PDF)
5962-9052604Q9A Price & Availability
5962-9052604Q9A Features- ?55°C to 125°C Operating Temperature Range, QML Processing
- Processed to MIL-PRF-38535 (QML)
- Performance
- SMJ320C30-40 (50-ns Cycle)
40 MFLOPS 20 MIPS - SMJ320C30-50 (40-ns Cycle)
50 MFLOPS 25 MIPS
- Two 1K-Word × 32-Bit Single-Cycle Dual-Access On-Chip RAM Blocks
- Validated Ada Compiler
- 64-Word × 32-Bit Instruction Cache
- 32-Bit Instruction and Data Words, 24-Bit Addresses
- 40 / 32-Bit Floating-Point / Integer Multiplier and Arithmetic Logic Unit (ALU)
- Parallel ALU and Multiplier Execution in a Single Cycle
- On-Chip Direct Memory Access (DMA) Controller for Concurrent I/O and CPU Operation
- Integer, Floating-Point, and Logical Operations
- One 4K-Word × 32-Bit Single-Cycle Dual-Access On-Chip ROM Block
- Two 32-Bit External Ports (24- and 13-Bit Address)
- Two Serial Ports With Support for 8- / 16- / 24- / 32-Bit Transfers
- Packaging
- 181-Pin Grid Array Ceramic Package (GB Suffix)
- 196-Pin Ceramic Quad Flatpack With Nonconductive Tie-Bar (HFG Suffix)
- SMD Approval for 40- and 50-MHz Versions
- Two Address Generators With Eight Auxiliary Registers and Two Auxiliary Register Arithmetic Units (ARAUs)
- Zero-Overhead Loops With Single-Cycle Branches
- Interlocked Instructions for Multiprocessing Support
- 32-Bit Barrel Shifter
- Eight Extended-Precision Registers (Accumulators)
- Two- and Three-Operand Instructions
- Conditional Calls and Returns
- Block Repeat Capability
- Fabricated Using Enhanced Performance Implanted CMOS (EPIC?) by Texas Instruments
- Two 32-Bit Timers
5962-9052604Q9A Parameters
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Keywords
| 5962-9052604Q9A Data Sheet |
5962-9052604Q9A Spec |
5962-9052604Q9A Application Notes |
5962-9052604Q9A Distributor |
| 5962-9052604Q9A Circuit |
5962-9052604Q9A Reference |
5962-9052604Q9A PDF |
5962-9052604Q9A RoHS |
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