CD40102B

CD40102B Description

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CD40102B Datasheet (PDF)

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CD40102B Features

• Synchronous or asynchronous preset
• Medium-speed operation: f_CL = 3.6 MHz (typ.) @ V_DD = 10V
• Cascadable
• 100% tested for quiescent current at 20 V
• Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
• Noise margin (full package-temperature range) = 1 V at V_DD = 5 V 2 V at V_DD = 10 V 2.5 V at V_DD = 15 V
• Standardized, symmetrical output characteristics
• 5-V, 10-V, and 15-V parametric ratings
• Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ?B? Series CMOS Devices"
• Applications:
  • Divide-by-"N" counters
  • Programmable timers
  • Interrupt timers
  • Cycle/program counter

CD40102B Parameters

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