| CD40105B Description | | CMOS 4-Bit-by-16-Word FIFO Register | | CD40105B Vendor | | Texas Instruments | | CD40105B Categories | | | CD40105B Features | - Independent asynchronous inputs and outputs
- 3-state outputs
- Expandable in either direction
- Status indicators on input and output
- Reset capability
- Standardized, symmetrical output characteristics
- 100% tested for quiescent current at 20 V
- 5-V, 10-V, and 15-V parametric ratings
- Maximum input current of 1 uA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
- Noise margin (over full package-temperature range): 1V at VDD= 5V, 2V at VDD= 10 V, 2.5 V at VDD= 15 V
- Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
- Applications
- Bit rate smoothing
- CPU/terminal buffering
- Data communications
- Peripheral buffering
- Line printer input buffers
- Auto dialers
- CRT buffer memories
- Radar data acquisition
| | CD40105B Datasheet and Application Notes | | | Parameter | Value | | Voltage Nodes (V) | 5, 10, 15 | | Products related to CD40105B | | CD40105BF3A CD40105BF CD40105BE |
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