CD4012BNSR Manufacturer
CD4012BNSR DescriptionCD4012BNSR DescriptionCD4012BNSR Categories
CD4012BNSR Datasheet (PDF)
CD4012BNSR Price & Availability
CD4012BNSR Features- Propagation delay time = 60 ns (typ.) at CL= 50 pF, VDD= 10 V
- Buffered inputs and outputs
- Standardized symmetrical output characteristics
- Maximum input current of 1 µA at 18 V over-full package temperature range; 100 nA at 18 V and 25°C
- 100% tested for quiescent current at 20 V
- 5-V, 10-V, and 15-V parametric ratings
- Noise margin (over full package temperature range:
1 V at VDD= 5 V
2 V at VDD= 10 V
2.5 at VDD= 15 V - Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of "B" Series CMOS Devices"
CD4012BNSR Parameters
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