| CD4015B Description | | CMOS Dual 4-Stage Static Shift Register | | CD4015B Vendor | | Texas Instruments | | CD4015B Categories | | | CD4015B Features | - Medium speed operation...12 MHz (typ.) clock rate at VDD– VSS= 10 V
- Fully static operation
- 8 master-slave flip-flops plus input and output buffering
- 100% tested for quiescent current at 20 V
- 5-V, 10-V, and 15-V parametric ratings
- Standardized, symmetrical output characteristics
- Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
- Noise margin (full package-temperature range) =
- 1 V at VDD= 5 V
- 2 V at VDD= 10 V
- 2.5 V at VDD= 15 V
- Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
- Applications:
- Serial-input/parallel-output data queueing
- Serial to parallel data conversion
- General-purpose register
| | CD4015B Datasheet and Application Notes | | | Parameter | Value | | Voltage Nodes (V) | 5, 10, 15 | | Products related to CD4015B | CD4015BPWR CD4015BNSR CD4015BPW CD4015BF3A
CD4015BMT CD4015BM96 CD4015BE CD4015BM
CD4015BF |
|