CD40161BPW

CD40161BPW Description

CD40161BPW Description

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CD40161BPW Manufacturer

CD40161BPW Datasheet (PDF)

CD40161BPW Price & Availability

CD40161BPW Features

• Internal look-ahead for fast counting
• Carry output for cascading
• Synchronously programmable
• Clear asynchronous input (CD40160B, CD40161B)
• Clear synchronous input (CD40162B, CD40163B)
• Synchronous load control input
• Low-power TTL compatibility
• Standardized, symmetrical output characteristics
• 100% tested for quiescent current at 20 V
• Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
• Noise margin (full package temperature range):
  • 1 V at V_DD= 5 V
  • 2 V at V_DD= 10 V
  • 2.5 V at V_DD= 15 V
• 5-V, 10-V, and 15-V parametric ratings
• Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
• Applications
  • Programmable binary and decade counting
  • Counter control/timers
  • Frequency dividing

CD40161BPW Parameters

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