CD40192B
CD40192B Description
CMOS Presettable BCD Up/Down Counter (Dual Clock with Reset)
CD40192B Vendor
Texas Instruments
CD40192B Categories
CD40192B Features
  • Individual clock lines for counting up or counting down
  • Synchronous high-speed carry and borrow propagation delays for cascading
  • Asynchronous reset and preset capability
  • Medium-speed operation–fCL= 8MHz (typ.) @ 10 V
  • 5-V, 10-V, and 15-V parametric ratings
  • Standardized, symmetrical output characteristics
  • 100% tested for quiescent current at 20 V
  • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • Noise margin (full package-temperature range) =
    1 V at VDD= 5 V
    2 V at VDD= 10 V
    2.5 V at VDD= 15 V
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
  • Applications:
    • Up/down difference counting
    • Multistage ripple counting
    • Synchronous frequency dividers
    • A/D and D/A conversion
    • Programmable binary or BCD counting
CD40192B Datasheet and Application Notes
ParameterValue
Voltage Nodes (V)5, 10, 15
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CD40193BPWR   CD40193BNSR   CD40193BPW   CD40192BNSR   
CD40192BE   CD40193BE   CD40192BF3A   CD40192BF   

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