CD4019BE Manufacturer
CD4019BE DescriptionCD4019BE DescriptionCD4019BE Description
CD4019BE Datasheet (PDF)
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CD4019BE Features- Medium speed operation??tPHL= tPLH= 60 ns (typ.) at CL= 50 pF, VDD= 10 V
- Standardized, symmetrical output characteristics
- 100% tested for quiescent current at 20 V
- 5-V, 10-V, and 15-V parametric ratings
- Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ?B? Series CMOS Devices"
- Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
- Noise margin (full package-temperature range) =
1 V at VDD= 5 V
2 V at VDD= 10 V
2.5 V at VDD= 15 V - Applications:
- AND-OR select gating
- Shift-right/shift-left registers
- True/complement selection
- AND/OR/Exclusive-OR selection
CD4019BE Parameters
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