| CD4019BPW Description | | CMOS Quad AND/OR Select Gate | | CD4019BPW Vendor | | Texas Instruments | | CD4019BPW Features | - Medium speed operation……tPHL= tPLH= 60 ns (typ.) at CL= 50 pF, VDD= 10 V
- Standardized, symmetrical output characteristics
- 100% tested for quiescent current at 20 V
- 5-V, 10-V, and 15-V parametric ratings
- Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
- Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
- Noise margin (full package-temperature range) =
1 V at VDD= 5 V
2 V at VDD= 10 V
2.5 V at VDD= 15 V - Applications:
- AND-OR select gating
- Shift-right/shift-left registers
- True/complement selection
- AND/OR/Exclusive-OR selection
| | CD4019BPW Datasheet and Application Notes | | | Parameter | Value | | Voltage Nodes (V) | 5, 10, 15 | | Status | ACTIVE | | Temp (oC) | -55 to 125 | | Budget Price ($US) | QTY | 0.24 | 1KU | | Package Type| Pins | TSSOP (PW) | 16 | | STD Pack QTY | 90 | | Products related to CD4019BPW | CD4019BE JM38510/05352BEA CD4019B CD4019BMT
CD4019BM96 CD4019BF3A CD4019BPWR CD4019BNSR
CD4019BF CD4019BM |
|