CD4024BNSR DescriptionCD4024BNSR DescriptionCD4024BNSR DescriptionCD4024BNSR CategoriesCD4024BNSR Manufacturer
CD4024BNSR Datasheet (PDF)
CD4024BNSR Price & Availability
CD4024BNSR Features- Medium-speed operation
- Fully static operation
- Buffered inputs and outputs
- 100% tested for quiescent current at 20 V
- Standardized, symmetrical output characteristics
- Fully static operation
- Common reset
- 5-V, 10-V, and 15-V parametric ratings
- Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
- Noise margin (over full package-temperature range):
1 V at VDD= 5 V
2 V at VDD= 10 V
2.5 V at VDD= 15 V - Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
- Applications:
- Control counters
- Timers
- Frequency dividers
- Time-delay circuits
CD4024BNSR Parameters
Products Similar to CD4024BNSR
Other Components
D38999/20WJ24BD
X93156UM8IZ-2.7
RCC07DREH
EMS23CHD-64.000M
M7TXK-1405K
Keywords
| CD4024BNSR Data Sheet |
CD4024BNSR Spec |
CD4024BNSR Application Notes |
CD4024BNSR Distributor |
| CD4024BNSR Circuit |
CD4024BNSR Reference |
CD4024BNSR PDF |
CD4024BNSR RoHS |
|