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CD4024BPWR

CD4024BPWR Description

CD4024BPWR Description

CD4024BPWR Description

CD4024BPWR Categories

CD4024BPWR Manufacturer

CD4024BPWR Datasheet (PDF)

CD4024BPWR Price & Availability


Check CD4024BPWR Price & Availability at Canics

CD4024BPWR Features

  • Medium-speed operation
  • Fully static operation
  • Buffered inputs and outputs
  • 100% tested for quiescent current at 20 V
  • Standardized, symmetrical output characteristics
  • Fully static operation
  • Common reset
  • 5-V, 10-V, and 15-V parametric ratings
  • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • Noise margin (over full package-temperature range):

    1 V at VDD= 5 V

    2 V at VDD= 10 V

    2.5 V at VDD= 15 V
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
  • Applications:
    • Control counters
    • Timers
    • Frequency dividers
    • Time-delay circuits

CD4024BPWR Parameters

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Keywords
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