| CD4030BPW Manufacturer | Texas Instruments |
| CD4030BPW Description | CMOS Quad Exclusive-OR Gate |
| CD4030BPW Datasheet (PDF) | |
| CD4030BPW Features | - Medium-speed operation?tPHL, tPLH= 65 ns (typ.) at VDD= 10 V, CL= 50 pF
- 100% tested for quiescent current at 20 V
- Standardized, symmetrical output characteristics
- 5-V, 10-V, and 15-V parametric ratings
- Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
- Noise margin (over full package-temperature range) =
1 V at VDD= 5 V
2 V at VDD= 10 V
2.5 V at VDD= 15 V - Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ?B? Series CMOS Devices"
- Applications:
- Even and odd-parity generators and checkers
- Logical comparators
- Adders/subtractors
- General logic functions
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| CD4030BPW Parameters | | Status | ACTIVE | | Budget Price ($US) | QTY | 0.22 | 1KU | | STD Pack QTY | 90 | | Temp (oC) | -55 to 125 | | Package Type| Pins | TSSOP (PW) | 14 | | Voltage Nodes (V) | 5, 10, 15 |
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