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CD4071BPWR Datasheet

CD4071BPWR ManufacturerTexas Instruments
CD4071BPWR DescriptionCMOS Quad 2-Input OR Gate
CD4071BPWR Categories
2-Input OR Gates
CD4071BPWR Datasheet (PDF)
CD4071BPWR Datasheet
CD4071BPWR Features
  • Medium-Speed Operation - tPLH, tPHL= 60 ns (typ.) at VDD= 10 V
  • 100% tested for quiescent current at 20 V
  • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • Standardized, symmetrical output characteristics
  • Noise margin (full package-temperature range):

    1 V at VDD= 5 V

    2 V at VDD= 10 V

    2.5 V at VDD= 15 V
  • 5-V, 10-V, and 15-V parametric ratings
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ?B? Series CMOS Devices"
CD4071BPWR Parameters
StatusACTIVE
Budget Price ($US) | QTY0.15 | 1KU
STD Pack QTY2000
Temp (oC)-55 to 125
Package Type| PinsTSSOP (PW) | 14
Voltage Nodes (V)5, 10, 15
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