CD4072BF3A

CD4072BF3A Manufacturer

CD4072BF3A Description

CD4072BF3A Datasheet (PDF)

CD4072BF3A Price & Availability

CD4072BF3A Features

• Medium-Speed Operation - t_PLH, t_PHL= 60 ns (typ.) at V_DD= 10 V
• 100% tested for quiescent current at 20 V
• Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
• Standardized, symmetrical output characteristics
• Noise margin (full package-temperature range):
  
  1 V at V_DD= 5 V
  
  2 V at V_DD= 10 V
  
  2.5 V at V_DD= 15 V
• 5-V, 10-V, and 15-V parametric ratings
• Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ?B? Series CMOS Devices"

CD4072BF3A Parameters

Products Similar to CD4072BF3A