CD4072BPW
CD4072BPW Description
CMOS Dual 4-Input OR Gate
CD4072BPW Vendor
Texas Instruments
CD4072BPW Features
  • Medium-Speed Operation - tPLH, tPHL= 60 ns (typ.) at VDD= 10 V
  • 100% tested for quiescent current at 20 V
  • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • Standardized, symmetrical output characteristics
  • Noise margin (full package-temperature range):
    1 V at VDD= 5 V
    2 V at VDD= 10 V
    2.5 V at VDD= 15 V
  • 5-V, 10-V, and 15-V parametric ratings
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
CD4072BPW Datasheet and Application Notes
ParameterValue
Voltage Nodes (V)5, 10, 15
StatusACTIVE
Temp (oC)-55 to 125
Budget Price ($US) | QTY0.15 | 1KU
Package Type| PinsTSSOP (PW) | 14
STD Pack QTY90
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