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CD4518BPW

CD4518BPW Description

CD4518BPW Description

CD4518BPW Description

CD4518BPW Description

CD4518BPW Categories

CD4518BPW Manufacturer

CD4518BPW Datasheet (PDF)

CD4518BPW Price & Availability


Check CD4518BPW Price & Availability at Canics

CD4518BPW Features

  • Medium-speed operation -

    6-MHz typical clock frequency at 10 V
  • Positive- or negative-edge triggering
  • Synchronous internal carry propagation
  • 100% tested for quiescent current at 20 V
  • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • Noise margin (over full package-temperature range):
    • 1 V at VDD= 5 V
    • 2 V at VDD= 10 V
    • 2.5 V at VDD= 15 V
  • 5-V, 10-V, and 15-V parametric ratings
  • Standardized, symmetrical output characteristics
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ?B? Series CMOS Devices"
  • Applications
    • Multistage synchronous counting
    • Multistage ripple counting
    • Frequency dividers

CD4518BPW Parameters

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