CD4572UB

CD4572UB Description

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CD4572UB Datasheet (PDF)

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CD4572UB Features

• Pin 7 NOR input positioned adjacent to V_SSfor easy use of gate as an inverter
• Pin 15 NAND input positioned adjacent to V_DDfor easy use of gate as an inverter
• Standard symmetrical output characteristics
• 100% tested for quiescent current at 20 V
• Maximum input current of 1 µA at 18 V over full package-temperature range:
  
  100 nA at 18 V and 25°C
• 5-V, 10-V, and 15-V parametric ratings
• Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"

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