- Buffered Positive Edge Triggered Clock
- Asynchronous Common Reset
- Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
- Wide Operating Temperature Range . . . -55°C to 125°C
- Balanced Propagation Delay and Transition Times
- Significant Power Reduction Compared to LSTTL Logic ICs
- HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL= 30%, NIH= 30% of VCCat VCC= 5V
- HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH= 2V (Min)
- CMOS Input Compatibility, Il1µA at VOL, VOH
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