CD74AC112
CD74AC112 Description
Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset
CD74AC112 Vendor
Texas Instruments
CD74AC112 Categories
CD74AC112 Features
  • AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the Supply Voltage
  • Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption
  • Balanced Propagation Delays
  • ±24-mA Output Drive Current
    • Fanout to 15 F Devices
  • SCR-Latchup-Resistant CMOS Process and Circuit Design
  • Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015
CD74AC112 Datasheet and Application Notes
ParameterValue
Voltage Nodes (V)
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CD54AC112   

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