| CD74ACT109M96 Description |
| Dual Positive-Edge Triggered J-K Flip-Flops with Set and Reset |
| CD74ACT109M96 Vendor |
| Texas Instruments |
| CD74ACT109M96 Features |
- Inputs Are TTL-Voltage Compatible
- Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption
- Balanced Propagation Delays
- ±24-mA Output Drive Current
- SCR-Latchup-Resistant CMOS Process and Circuit Design
- Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015
|
| CD74ACT109M96 Datasheet and Application Notes |
|
| Parameter | Value |
| Voltage Nodes (V) | |
| Status | ACTIVE |
| Temp (oC) | -55 to 125 |
| Budget Price ($US) | QTY | 0.26 | 1KU |
| Package Type | Pins | SOIC (D) | 16 |
| STD Pack QTY | 2500 |
| Products related to CD74ACT109M96 |
CD54ACT109 CD74ACT109 CD74ACT109M CD54ACT109F3A
CD74ACT109E |