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CD74ACT297

CD74ACT297 Description

CD74ACT297 Categories

CD74ACT297 Manufacturer

CD74ACT297 Datasheet (PDF)

CD74ACT297 Datasheet
Digital Phase-Locked Loop (Rev. D)

CD74ACT297 Price & Availability


Check CD74ACT297 Price & Availability at Canics

CD74ACT297 Features

  • Speed of Bipolar FCT, AS, and S, With Significantly Reduced Power Consumption
  • Digital Design Avoids Analog Compensation Errors
  • Easily Cascadable for Higher-Order Loops
  • Useful Frequency Range
    • DC to 110 MHz Typical (K CLK)
    • DC to 70 MHz Typical (I/D CLK)
  • Dynamically Variable Bandwidth
  • Very Narrow Bandwidth Attainable
  • Power-On Reset
  • Output Capability
    • Standard: XORPD OUT, ECPD OUT
    • Bus Driver: I/D OUT
  • SCR Latch-Up-Resistant CMOS Process and Circuit Design
  • Balanced Propagation Delays
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015

CD74ACT297 Parameters

Voltage Nodes (V)5
Select parameters and click to see components with these parameters.

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Keywords
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