- Buffered inputs
- Typical propagation delay: 5 ns @ VCC = 5 V, TA = 25°C, CL = 50 pF
- Exceeds 2-kV ESD Protection - MIL-STD-883, Method 3015
- SCR-Latch-up-resistant CMOS process and circuit design
- Speed of bipolar FAST*/AS/S with significantly reduced power consumption
- Balanced propagation delays
- AC types feature 1.5-V to 5.5-V operation and balanced noise immunity at 30% of the supply
- ± 24-mA output drive current -Fanout to 15 FAST* ICs -Drives 50-ohm transmission lines
- Characterized for operation from -40° to 85°C
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