CD74HC109M96
CD74HC109M96 Description
High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset
CD74HC109M96 Vendor
Texas Instruments
CD74HC109M96 Features
  • Asynchronous Set and Reset
  • Schmitt Trigger Clock Inputs
  • Typical fMAX = 54MHz at VCC = 5V, CL = 15pF, A = 25°C
  • Fanout (Over Temperature Range)
    • Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
    • Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
  • Wide Operating Temperature Range . . . -55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1µA at VOL, VOH
CD74HC109M96 Datasheet and Application Notes
ParameterValue
Voltage Nodes (V)
StatusACTIVE
Temp (oC)-55 to 125
Budget Price ($US) | QTY0.20 | 1KU
Package Type | PinsSOIC (D) | 16
STD Pack QTY2500
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