CD74HCT297

CD74HCT297 Description

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CD74HCT297 Datasheet (PDF)

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CD74HCT297 Features

• Digital Design Avoids Analog Compensation Errors
• Easily Cascadable for Higher Order Loops
• Useful Frequency Range
  • K-Clock...DC to 55MHz (Typ)
  • I/D-Clock...DC to 35MHz (Typ)
• Dynamically Variable Bandwidth
• Very Narrow Bandwidth Attainable
• Power-On Reset
• Output Capability
  • Standard...XORPD_OUT, ECPD_OUT
  • Bus Driver...I/D_OUT
• Fanout (Over Temperature Range)
  • Standard Outputs...10 LSTTL Loads
  • Bus Driver Outputs...15 LSTTL Loads
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• ?HC297 Types
  • Operation Voltage...2 to 6V
  • High Noise Immunity N_IL = 30%, N_IH = 30% of V_CC at 5V
• CD74HCT297 Types
  • Operation Voltage...4.5 to 5.5V
  • Direct LSTTL Input Logic Compatibility V_IL =0.8V (Max), V_IH =2V (Min)
  • CMOS Input Compatibility I_I 1ľA at V_OL , V_OH

CD74HCT297 Parameters

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