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CDC208DBLE

CDC208DBLE Description

5V Dual 1-to-4 clock driver

CDC208DBLE Categories

Clock Drivers
Obsolete ICs

CDC208DBLE Manufacturer

Texas Instruments

CDC208DBLE Datasheet (PDF)

CDC208DBLE Datasheet
Dual 1-Line To 4-Line Clock Drivers With 3-State Outputs (Rev. F)

CDC208DBLE Price & Availability


Check CDC208DBLE Price & Availability at Canics

CDC208DBLE Features

  • Low-Skew Propagation Delay Specifications for Clock-Driver Applications
  • TTL-Compatible Inputs and CMOS-Compatible Outputs
  • Flow-Through Architecture Optimizes PCB Layout
  • Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise
  • EPICTM (Enhanced-Performance Implanted CMOS) 1-um Process
  • 500-mA Typical Latch-Up Immunity at 125°C
  • Package Options Include Plastic Small-Outline (DW)

CDC208DBLE Parameters

Pin/Package20SOIC
Approx. 1KU Price (US$)4.1
StatusObsolete
Package Type | PinsSSOP (DB) | 20
Input LevelTTL
Output LevelCMOS
No. of Outputs8
Frequency (Max) (MHz)60
VCC (V)5
Select parameters and click to see components with these parameters.

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CDC208, CDC208DW, CDC208DWR, CDC208N

 
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Keywords
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