CDC208DWR DescriptionCDC208DWR DescriptionCDC208DWR DescriptionCDC208DWR CategoriesCDC208DWR Manufacturer
CDC208DWR Datasheet (PDF)
CDC208DWR Price & Availability
CDC208DWR Features- Low-Skew Propagation Delay Specifications for Clock-Driver Applications
- TTL-Compatible Inputs and CMOS-Compatible Outputs
- Flow-Through Architecture Optimizes PCB Layout
- Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise
- EPICTM (Enhanced-Performance Implanted CMOS) 1-um Process
- 500-mA Typical Latch-Up Immunity at 125°C
- Package Options Include Plastic Small-Outline (DW)
CDC208DWR Parameters
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