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CDC2509CPW

CDC2509CPW Description

CDC2509CPW Description

CDC2509CPW Description

CDC2509CPW Categories

CDC2509CPW Manufacturer

CDC2509CPW Datasheet (PDF)

CDC2509CPW Datasheet
CDC2509C
CDC2509CPW Datasheet

CDC2509CPW Price & Availability


Check CDC2509CPW Price & Availability at Canics

CDC2509CPW Features

  • Use CDCVF2510A as a Replacement for this Device
  • Designed to Meet PC SDRAM Registered DIMM Design Support Document Rev. 1.2
  • Spread Spectrum Clock Compatible
  • Operating Frequency 25 MHz to 125 MHz
  • Static tPhase Error Distribution at 66MHz to 100 MHz is ±150 ps
  • Drop-In Replacement for TI CDC2509A With Enhanced Performance
  • Jitter (cyc - cyc) at 66 MHz to 100 MHz is |100 ps|
  • Available in Plastic 24-Pin TSSOP
  • Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications
  • Distributes One Clock Input to One Bank of Five and One Bank of Four Outputs
  • Separate Output Enable for Each Output Bank
  • External Feedback (FBIN) Terminal Is Used to Synchronize the Outputs to the Clock Input
  • On-Chip Series Damping Resistors
  • No External RC Network Required
  • Operates at 3.3 V

CDC2509CPW Parameters

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Keywords
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CDC2509CPW Circuit CDC2509CPW Reference CDC2509CPW PDF CDC2509CPW RoHS