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CDC2510APWR

CDC2510APWR Description

3.3-V Phase-Lock Loop Clock Driver

CDC2510APWR Description

IC 3.3V PLL CLK-DRVR 24-TSSOP

CDC2510APWR Categories

Clock Drivers

CDC2510APWR Manufacturer

Texas Instruments

CDC2510APWR Datasheet (PDF)

CDC2510APWR Datasheet
CDC2510A

CDC2510APWR Price & Availability


Check CDC2510APWR Price & Availability at Canics

CDC2510APWR Features

  • Use CDCVF2510A as a Replacement for this Device
  • Spread Spectrum Clock Compatible
  • 100-MHz Maximum Frequency
  • Available in Plastic 24-Pin TSSOP
  • Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications
  • Distributes One Clock Input to One Bank of Ten Outputs
  • Single Output Enable Terminal Controls All Ten Outputs
  • External Feedback (FBIN) Pin Is Used to Synchronize the Outputs to the Clock Input
  • On-Chip Series Damping Resistors
  • No External RC Network Required
  • Operates at 3.3-V VCC

CDC2510APWR Parameters

Pin/Package24TSSOP
Approx. 1KU Price (US$)6.1
StatusACTIVE
Temp (oC)0 to 70
Budget Price ($US) | QTY6.10 | 1KU
Package Type | PinsTSSOP (PW) | 24
STD Pack QTY2000
TypeDriver, PLL
Input LevelLVTTL
Output LevelTTL
OutputTTL
No. of Outputs10
CategoryIntegrated Circuits (ICs)
FamilyClock/Timing - Clock Buffers, Drivers
VCC (V)3.3
t(phase error) (Min) (ps)-700
t(phase error) (Max) (ps)-300
Operating Frequency Range (Min) (MHz)80
Operating Frequency Range (Max) (MHz)125
InputLVTTL
Operating Temperature0°C ~ 70°C
Package / Case24-TSSOP
Number of Circuits*
Voltage - Supply3 V ~ 3.6 V
Frequency-Max125MHz
Ratio - Input:Output*
Differential - Input:Output*
Select parameters and click to see components with these parameters.

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Keywords
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CDC2510APWR Circuit CDC2510APWR Reference CDC2510APWR PDF CDC2510APWR RoHS