| CDC2510C Description |
| 3.3-V Phase-Lock Loop Clock Driver |
| CDC2510C Vendor |
| Texas Instruments |
| CDC2510C Categories |
|
| CDC2510C Features |
- Use CDCVF2510A as a Replacement for this Device
- Designed to Meet PC SDRAM Registered DIMM Design Support Document Rev. 1.2
- Spread Spectrum Clock Compatible
- Operating Frequency 25 MHz to 125 MHz
- Static tPhase Error Distribution at 66 MHz to 100 MHz is ±150 ps
- Drop-In Replacement for TI CDC2510A With Enhanced Performance
- Jitter (cyc - cyc) at 66 MHz to 100 MHz is |100 ps|
- Available in Plastic 24-Pin TSSOP
- Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications
- Distributes One Clock Input to One Bank of Ten Outputs
- External Feedback (FBIN) Terminal Is Used to Synchronize the Outputs to the Clock Input
- On-Chip Series Damping Resistors
- No External RC Network Required
- Operates at 3.3 V
|
| CDC2510C Datasheet and Application Notes |
|
| Parameter | Value |
| Input Level | LVTTL |
| Output Level | TTL |
| VCC (V) | 3.3 |
| t(phase error) (Min) (ps) | -150 |
| t(phase error) (Max) (ps) | 150 |
| No. of Outputs | 10 |
| Operating Frequency Range (Min) (MHz) | 25 |
| Operating Frequency Range (Max) (MHz) | 125 |
| Absolute Jitter (cycle-to-cycle) (ps) | 100 |
| Pin/Package | 24TSSOP |
| Approx. 1KU Price (US$) | 2.15 |
| Products related to CDC2510C |
| CDC2510CPW CDC2510CPWR |