| CDC2536 Description |
| 3.3V PLL Clock Driver with 1/2x, 1x and 2x Frequency Options |
| CDC2536 Vendor |
| Texas Instruments |
| CDC2536 Categories |
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| CDC2536 Features |
- Low Output Skew for Clock-Distribution and Clock-Generation Applications
- Operates at 3.3-V VCC
- Distributes One Clock Input to Six Outputs
- One Select Input Configures Three Outputs to Operate at One-Half or Double the Input Frequency
- No External RC Network Required
- On-Chip Series Damping Resistors
- External Feedback Pin (FBIN) Is Used to Synchronize the Outputs to the Clock Input
- Application for Synchronous DRAM, High-Speed Microprocessor
- TTL-Compatible Inputs and Outputs
- Outputs Drive 50- Parallel-Terminated Transmission Lines
- State-of-the-Art EPIC-IIB™ BiCMOS Design Significantly Reduces Power Dissipation
- Distributed VCC and Ground Pins Reduce Switching Noise
- Packaged in Plastic 28-Pin Shrink Small-Outline Package
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| CDC2536 Datasheet and Application Notes |
|
| Parameter | Value |
| Multiplier Ratio | 1/2, 1, 2 |
| Input Level | LVTTL |
| Pin/Package | 28SSOP |
| Approx. 1KU Price (US$) | 2 |
| Output Level | TTL |
| Output Frequency (Min) (Mhz) | 25 |
| Output Frequency (Max) (Mhz) | 100 |
| VCC (V) | 3.3 |
| Jitter-Peak to Peak(P-P) or Cycle to Cycle(C-C) | P-P 200ps |
| Phase Error | +/-500 |
| Output Skew (ps) | 500 |
| Temp Range (C) | 0 to 70 |
| Products related to CDC2536 |
| CDC2536DLR CDC2536DBR CDC2536DL |