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CDC2536

CDC2536 Description

CDC2536 Categories

CDC2536 Manufacturer

CDC2536 Datasheet (PDF)

CDC2536 Price & Availability


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CDC2536 Features

  • Low Output Skew for Clock-Distribution and Clock-Generation Applications
  • Operates at 3.3-V VCC
  • Distributes One Clock Input to Six Outputs
  • One Select Input Configures Three Outputs to Operate at One-Half or Double the Input Frequency
  • No External RC Network Required
  • On-Chip Series Damping Resistors
  • External Feedback Pin (FBIN) Is Used to Synchronize the Outputs to the Clock Input
  • Application for Synchronous DRAM, High-Speed Microprocessor
  • TTL-Compatible Inputs and Outputs
  • Outputs Drive 50- Parallel-Terminated Transmission Lines
  • State-of-the-Art EPIC-IIB? BiCMOS Design Significantly Reduces Power Dissipation
  • Distributed VCC and Ground Pins Reduce Switching Noise
  • Packaged in Plastic 28-Pin Shrink Small-Outline Package

CDC2536 Parameters

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Keywords
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