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CDC2536DLR

CDC2536DLR Description

3.3V PLL Clock Driver with 1/2x, 1x and 2x Frequency Options

CDC2536DLR Categories

Clock Drivers
Obsolete ICs

CDC2536DLR Manufacturer

Texas Instruments

CDC2536DLR Datasheet (PDF)

CDC2536DLR Datasheet
CDC2536: 3.3-V PLL Clock Driver With 3-State Outputs (Rev. E)

CDC2536DLR Price & Availability


Check CDC2536DLR Price & Availability at Canics

CDC2536DLR Features

  • Low Output Skew for Clock-Distribution and Clock-Generation Applications
  • Operates at 3.3-V VCC
  • Distributes One Clock Input to Six Outputs
  • One Select Input Configures Three Outputs to Operate at One-Half or Double the Input Frequency
  • No External RC Network Required
  • On-Chip Series Damping Resistors
  • External Feedback Pin (FBIN) Is Used to Synchronize the Outputs to the Clock Input
  • Application for Synchronous DRAM, High-Speed Microprocessor
  • TTL-Compatible Inputs and Outputs
  • Outputs Drive 50- Parallel-Terminated Transmission Lines
  • State-of-the-Art EPIC-IIB? BiCMOS Design Significantly Reduces Power Dissipation
  • Distributed VCC and Ground Pins Reduce Switching Noise
  • Packaged in Plastic 28-Pin Shrink Small-Outline Package

CDC2536DLR Parameters

Pin/Package28SSOP
Approx. 1KU Price (US$)2
StatusObsolete
Package Type | PinsSSOP (DL) | 28
Input LevelLVTTL
Output LevelTTL
Temp Range (C)0 to 70
Phase Error+/-500
VCC (V)3.3
Multiplier Ratio1/2, 1, 2
Output Frequency (Min) (Mhz)25
Output Frequency (Max) (Mhz)100
Jitter-Peak to Peak(P-P) or Cycle to Cycle(C-C)P-P 200ps
Output Skew (ps)500
Select parameters and click to see components with these parameters.

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