| CDC2582 Description |
| 3.3V PLL Clock Driver with LVPECL Input and 12 LVTTL Outputs |
| CDC2582 Vendor |
| Texas Instruments |
| CDC2582 Categories |
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| CDC2582 Features |
- Low Output Skew for Clock-Distribution and Clock-Generation Applications
- Operates at 3.3-V VCC
- Distributes Differential LVPECL Clock Inputs to 12 TTL-Compatible Outputs
- Two Select Inputs Configure Up to Nine Outputs to Operate at One-Half or Double the Input Frequency
- No External RC Network Required
- External Feedback Input (FBIN) Is Used to Synchronize the Outputs With the Clock Inputs
- Application for Synchronous DRAMs
- Outputs Have Internal 26- Series Resistors to Dampen Transmission-Line Effects
- State-of-the-Art EPIC-IIBTM BiCMOS Design Significantly Reduces Power Dissipation
- Distributed VCC and Ground Pins Reduce Switching Noise
- Packaged in 52-Pin Quad Flatpack EPIC-IIB is a trademark of Texas Instruments Incorporated.
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| CDC2582 Datasheet and Application Notes |
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| Parameter | Value |
| Input Level | LVPECL |
| Output Level | TTL |
| VCC (V) | 3.3 |
| t(phase error) (Min) (ps) | -500 |
| t(phase error) (Max) (ps) | 500 |
| No. of Outputs | 12 |
| Operating Frequency Range (Min) (MHz) | 25 |
| Operating Frequency Range (Max) (MHz) | 100 |
| Absolute Jitter (cycle-to-cycle) (ps) | 100 |
| Pin/Package | 52TQFP |
| Approx. 1KU Price (US$) | 5 |
| Products related to CDC2582 |
| CDC2582PAH |