CDC319DBR DescriptionCDC319DBR DescriptionCDC319DBR CategoriesCDC319DBR Manufacturer
CDC319DBR Datasheet (PDF)
CDC319DBR Price & Availability
CDC319DBR Features- High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM (Synchronous DRAM) Clock Buffering Applications
- Output Skew, tsk(o), Less Than 250 ps
- Pulse Skew, tsk(p), Less Than 500 ps
- Supports up to Two Unbuffered SDRAM DIMMs (Dual Inline Memory Modules)
- I2C Serial Interface Provides Individual Enable Control for Each Output
- Operates at 3.3 V
- Distributed VCC and Ground Pins Reduce Switching Noise
- ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015
- Packaged in 28-Pin Shrink Small Outline (DB) Package
CDC319DBR Parameters
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