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CDC516DGG

CDC516DGG Description

3.3V Phase Lock Loop Clock Driver with 3-State Outputs

CDC516DGG Description

IC PLL CLOCK DVR 3.3V 48-TSSOP

CDC516DGG Categories

Clock Drivers

CDC516DGG Manufacturer

Texas Instruments

CDC516DGG Datasheet (PDF)

CDC516DGG Datasheet
CDC516
CDC516: 3.3-V Phase-Lock Loop Clock Driver (Rev. B)

CDC516DGG Price & Availability


Check CDC516DGG Price & Availability at Canics

CDC516DGG Features

  • Use CDCVF2510A as a Replacement for this Device
  • Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications
  • Distributes One Clock Input to Four Banks of Four Outputs
  • Separate Output Enable for Each Output Bank
  • External Feedback Pin (FBIN) Is Used to Synchronize the Outputs to the Clock Input
  • No External RC Network Required
  • Operates at 3.3-V VCC
  • Packaged in Plastic 48-Pin Thin Shrink Small-Outline Package

CDC516DGG Parameters

Pin/Package48TSSOP
Approx. 1KU Price (US$)2.9
StatusACTIVE
Budget Price ($US) | QTY2.90 | 1KU
Package Type | PinsTSSOP (DGG) | 48
STD Pack QTY40
TypeDriver, PLL
Input LevelLVTTL
Output LevelLVTTL
OutputLVTTL
No. of Outputs16
CategoryIntegrated Circuits (ICs)
FamilyClock/Timing - Clock Buffers, Drivers
VCC (V)3.3
InputLVTTL
Operating Temperature0°C ~ 70°C
Package / Case48-TSSOP
Number of Circuits*
Voltage - Supply3 V ~ 3.6 V
Frequency-Max125MHz
Ratio - Input:Output*
Differential - Input:Output*
Select parameters and click to see components with these parameters.

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Keywords
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CDC516DGG Circuit CDC516DGG Reference CDC516DGG PDF CDC516DGG RoHS