CDC582PAH

CDC582PAH Description

Low Output Skew for Clock-Distribution and Clock-Generation Applications
Operates at 3.3-V V_CC
Distributes Differential LVPECL Clock Inputs to 12 TTL-Compatible Outputs
Two Select Inputs Configure Up to Nine Outputs to Operate at One-Half or Double the Input Frequency
No External RC Network Required
State-of-the-Art EPIC-IIB^TM BiCMOS Design Significantly Reduces Power Dissipation
External Feedback Input (FBIN) Is Used to Synchronize the Outputs With the Clock Inputs
Application for Synchronous DRAMs
Distributed V_CC and Ground Pins Reduce Switching Noise
Packaged in 52-Pin Quad Flatpack EPIC-IIB is a trademark of Texas Instruments Incorporated.

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