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CDC857-3DGG

CDC857-3DGG Description

2 - Phase-Lock Loop Clock Drivers

CDC857-3DGG Description

IC 3.3V PLL CLK-DRVR 48-TSSOP

CDC857-3DGG Categories

Clock Drivers

CDC857-3DGG Manufacturer

Texas Instruments

CDC857-3DGG Datasheet (PDF)

CDC857-3DGG Datasheet
CDC857-2, CDC857-3

CDC857-3DGG Price & Availability


Check CDC857-3DGG Price & Availability at Canics

CDC857-3DGG Features

  • Phase-Lock Loop Clock Distribution for Double Data Rate Synchronous DRAM Applications
  • Distributes One Differential Clock Input to Ten Differential Outputs
  • External Feedback Pins (FBIN, FBIN\) Are Used to Synchronize the Outputs to the Clock Input
  • Operates at VCC = 2.5 V and AVCC = 3.3 V
  • Packaged in Plastic 48-Pin (DGG) Thin Shrink Small-Outline Package (TSSOP)
  • Spread Spectrum Clocking Tracking Capability to Reduce EMI

CDC857-3DGG Parameters

StatusACTIVE
Budget Price ($US) | QTY5.95 | 1KU
Budget Price ($US) | QTY6.65 | 1KU
Package Type | PinsTSSOP (DGG) | 48
STD Pack QTY40
TypeDriver, PLL
OutputSSTL-2
CategoryIntegrated Circuits (ICs)
FamilyClock/Timing - Clock Buffers, Drivers
InputLVTTL, SSTL-2
Operating Temperature0°C ~ 85°C
Package / Case48-TSSOP
Number of Circuits*
Voltage - Supply2.3 V ~ 2.7 V
Frequency-Max167MHz
Ratio - Input:Output*
Differential - Input:Output*
Select parameters and click to see components with these parameters.

Products Similar to CDC857-3DGG

CDC857, CDC857-2DGG, CDC857-2DGGR, CDC857-3DGGR

 
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Keywords
CDC857-3DGG Data Sheet CDC857-3DGG Spec CDC857-3DGG Application Notes CDC857-3DGG Distributor
CDC857-3DGG Circuit CDC857-3DGG Reference CDC857-3DGG PDF CDC857-3DGG RoHS