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CDCF2510

CDCF2510 Description

3.3-V Phase-Lock Loop Clock Driver

CDCF2510 Categories

Clock Drivers

CDCF2510 Manufacturer

Texas Instruments

CDCF2510 Datasheet (PDF)

CDCF2510 Datasheet

CDCF2510 Price & Availability


Check CDCF2510 Price & Availability at Canics

CDCF2510 Features

  • Use CDCVF2510A as a Replacement for this Device
  • Designed to Meet PC133 SDRAM Registered DIMM Specification Rev. 0.9
  • Spread Spectrum Clock Compatible
  • Operating Frequency 25 MHz to 140 MHz
  • Static Phase Error Distribution at 66 MHz to 133 MHz is ±125 ps
  • Jitter (cyc-cyc) at 66 MHz to 133 MHz Is |70| ps
  • Available in Plastic 24-Pin TSSOP
  • Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications
  • Distributes One Clock Input to One Bank of Ten Outputs
  • Output Enable Pin to Enable/Disable All 10 Outputs
  • External Feedback (FBIN) Terminal Is Used to Synchronize the Outputs to the Clock Input
  • On-Chip Series Damping Resistors
  • No External RC Network Required
  • Operates at 3.3 V

CDCF2510 Parameters

Pin/Package24TSSOP
Approx. 1KU Price (US$)3.75
Input LevelLVTTL
Output LevelLVTTL
No. of Outputs10
VCC (V)3.3
t(phase error) (Min) (ps)-125
t(phase error) (Max) (ps)125
Operating Frequency Range (Min) (MHz)25
Operating Frequency Range (Max) (MHz)140
Absolute Jitter (cycle-to-cycle) (ps)70
Select parameters and click to see components with these parameters.

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