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CDCV850

CDCV850 Description

2.5V Phase Lock Loop Differential Clock Driver with 2-Line Serial Interface

CDCV850 Categories

Clock Drivers

CDCV850 Manufacturer

Texas Instruments

CDCV850 Datasheet (PDF)

CDCV850 Datasheet
2.5-V Phase Lock Loop Clock Driver With 2-Line Serial Interface (Rev. B)

CDCV850 Price & Availability


Check CDCV850 Price & Availability at Canics

CDCV850 Features

  • Phase-Lock Loop Clock Driver for Double Data-Rate Synchronous DRAM Applications
  • Spread Spectrum Clock Compatible
  • Operating Frequency: 60 to 140 MHz
  • Low Jitter (cyc-cyc): ±75 ps
  • Distributes One Differential Clock Input to Ten Differential Outputs
  • Two-Line Serial Interface Provides Output Enable and Functional Control
  • Outputs Are Put Into a High-Impedance State When the Input Differential Clocks Are <20 MHz
  • 48-Pin TSSOP Package
  • Consumes <250-µA Quiescent Current
  • External Feedback Pins (FBIN, FBIN\) Are Used to Synchronize the Outputs to the Input Clocks

CDCV850 Parameters

Pin/Package48TSSOP
Approx. 1KU Price (US$)1.55
Input LevelSSTL-2, LVTTL
Output LevelSSTL-2
No. of Outputs10
VCC (V)2.5
t(phase error) (Min) (ps)-120
t(phase error) (Max) (ps)120
Operating Frequency Range (Min) (MHz)60
Operating Frequency Range (Max) (MHz)140
Absolute Jitter (cycle-to-cycle) (ps)30
Select parameters and click to see components with these parameters.

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