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CDCV855PWR Datasheet (PDF)
CDCV855PWR Price & Availability
CDCV855PWR Features- Phase-Lock Loop Clock Driver for Double Data-Rate Synchronous DRAM Applications
- Spread Spectrum Clock Compatible
- Operating Frequency: 60 MHz to 180 MHz
- Low Jitter (cyc-cyc): ±50 ps
- Distributes One Differential Clock Input to Four Differential Clock Outputs
- Enters Low Power Mode and Three-State Outputs When Input CLK Signal Is Less Than 20 MHz or PWRDWN Is Low
- Operates From Dual 2.5-V Supplies
- 28-Pin TSSOP Package
- Consumes < 200-µA Quiescent Current
- External Feedback PIN (FBIN, FBIN\) Are Used to Synchronize the Outputs to the Input Clocks
CDCV855PWR Parameters
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