CDCV857DGG DescriptionCDCV857DGG DescriptionCDCV857DGG DescriptionCDCV857DGG CategoriesCDCV857DGG Manufacturer
CDCV857DGG Datasheet (PDF)
CDCV857DGG Price & Availability
CDCV857DGG Features- Phase-Lock Loop Clock Driver for Double Data-Rate Synchronous DRAM Applications
- Spread Spectrum Clock Compatible
- Operating Frequency: 60 to 200 MHz
- Low Jitter (cyc-cyc): ±75 ps
- Distributes One Differential Clock Input to Ten Differential Outputs
- Three-State Outputs When the Input Differential Clocks Are <20 MHz
- Operates From Dual 2.5-V Supplies
- 48-Pin TSSOP Package
- Consumes < 200-uA Quiescent Current
- External Feedback PIN (FBIN, FBIN\) Are Used to Synchronize the Outputs to the Input Clocks
CDCV857DGG Parameters
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