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CDCV857DGGR

CDCV857DGGR Description

1:10 DDR Phase-Lock Loop Clock Driver

CDCV857DGGR Description

IC SSTL-II PLL CLK-DRVR 48-TSSOP

CDCV857DGGR Categories

Clock Drivers

CDCV857DGGR Manufacturer

Texas Instruments

CDCV857DGGR Datasheet (PDF)

CDCV857DGGR Datasheet
CDCV857
2.5-V Phase-Lock Loop Clock Driver (Rev. A)

CDCV857DGGR Price & Availability


Check CDCV857DGGR Price & Availability at Canics

CDCV857DGGR Features

  • Phase-Lock Loop Clock Driver for Double Data-Rate Synchronous DRAM Applications
  • Spread Spectrum Clock Compatible
  • Operating Frequency: 60 to 200 MHz
  • Low Jitter (cyc-cyc): ±75 ps
  • Distributes One Differential Clock Input to Ten Differential Outputs
  • Three-State Outputs When the Input Differential Clocks Are <20 MHz
  • Operates From Dual 2.5-V Supplies
  • 48-Pin TSSOP Package
  • Consumes < 200-uA Quiescent Current
  • External Feedback PIN (FBIN, FBIN\) Are Used to Synchronize the Outputs to the Input Clocks

CDCV857DGGR Parameters

Pin/Package48TSSOP
Approx. 1KU Price (US$)3.7
StatusACTIVE
Temp (oC)0 to 70
Budget Price ($US) | QTY3.70 | 1KU
Package Type | PinsTSSOP (DGG) | 48
STD Pack QTY2000
TypePLL Clock Driver
Input LevelSSTL-2, LVTTL
Output LevelSSTL-2
OutputSSTL-2
No. of Outputs10
CategoryIntegrated Circuits (ICs)
FamilyClock Buffers, Drivers
VCC (V)2.5
t(phase error) (Min) (ps)-100
t(phase error) (Max) (ps)100
Operating Frequency Range (Min) (MHz)60
Operating Frequency Range (Max) (MHz)200
Absolute Jitter (cycle-to-cycle) (ps)75
InputLVTTL, SSTL-2
Operating Temperature0°C ~ 85°C
Number of Outputs10
Package / Case48-TSSOP
Voltage - Supply2.375 V ~ 2.625 V
Frequency-Max200MHz
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