CDCVF25081D DescriptionCDCVF25081D DescriptionCDCVF25081D DescriptionCDCVF25081D CategoriesCDCVF25081D Manufacturer
CDCVF25081D Datasheet (PDF)
CDCVF25081D Price & Availability
CDCVF25081D Features- Phase-Locked Loop-Based Zero-Delay Buffer
- Operating Frequency: 10 MHz to 200 MHz
- Low Jitter (Cycle-Cycle): ±100 ps Over the Range 66 MHz to 200 MHz
- Distributes One Clock Input to Two Banks of Four Outputs
- Auto Frequency Detection to Disable Device (Power Down Mode)
- Consumes Less Than 20 µA in Power Down Mode
- Operates From Single 3.3-V Supply
- Industrial Temperature Range -40°C to 85°C
- 25- On-Chip Series Damping Resistors
- No External RC Network Required
- Spread Spectrum Clock Compatible (SSC)
- Available in 16-Pin TSSOP or 16-Pin SOIC Packages
CDCVF25081D Parameters
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