| DAC5674 Manufacturer | Texas Instruments | | DAC5674 Description | 14-Bit, 400 CommsDAC, 2x/4x Interpolation Filters | | DAC5674 Categories | | | DAC5674 Datasheet (PDF) | | | DAC5674 Features | - 200-MSPS Maximum Input Data Rate
- 400-MSPS Maximum Update Rate DAC
- 76-dBc SFDR Over Full First Nyquist Zone With Single Tone Input Signal (Fout = 21 MHz)
- 74-dBc ACPR W-CDMA at 15.36 MHz IF
- 69-dBc ACPR W-CDMA at 30.72 MHz IF
- Selectable 2x or 4x Interpolation Filter
- Linear Phase
- 0.05-dB Passband Ripple
- 80-dB Stopband Attenuation
- Stopband Transition 0.4-0.6 Fdata
- nterpolation Filters Configurable in Either Low-Pass or High-Pass Mode, Allows For Selection Higher Order Image
- On-chip 2x/4x PLL Clock Multiplier, PLL Bypass Mode
- Differential Scalable Current Outputs: 2 mA to 20 mA
- On-Chip 1.2-V Reference
- 1.8-V Digital and 3.3-V Analog Supply Operation
- 1.8/3.3-V CMOS Compatible Interface
- Power Dissipation: 435 mW at 400 MSPS
- Package: 48-Pin TQFP
- APPLICATIONS
- Cellular Base Transceiver Station Transmit Channel
- CDMA: W-CDMA, CDMA2000, IS-95
- TDMA: GSM, IS-136, EDGE/UWC-136
- Test and Measurement: Arbitrary Waveform Generation
- Direct Digital Synthesis (DDS)
- Cable Modem Termination System
| | DAC5674 Parameters | | Pin/Package | 48HTQFP | | Approx. 1KU Price (US$) | 19 | | Output Type | Current | | Resolution (Bits) | 14 | | Architecture | I-steering | | Power Consumption (Typ) (mW) | 435 | | DNL (Max) (+/-LSB) | 2 | | INL (Max) (+/-LSB) | 3.5 | | Analog Voltage AV/DD (Min) (V) | 3 | | Analog Voltage AV/DD (Max) (V) | 3.6 | | Logic Voltage DV/DD (Min) (V) | 1.65 | | Logic Voltage DV/DD (Max) (V) | 1.95 | | Settling Time (us) | 0.02 | | Update Rate (MSPS) | 400 | | DAC: Channels | 1 | | SNR (Typ) (dB) | 71 | | SFDR (Typ) (dB) | 76 | | Current Range (mA) | 20 |
|
| Related or Similar Components | DAC5674IPHP DAC5674IPHPR |
Datasheets
|